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Description

ELEC 374 looks at some of the advanced topics in digital systems. It begins by introducing high-performance logic circuits for fixed-point and floating-point arithmetic operations. Students will then learn the industry standard Verilog and VHDL hardware description languages in building digital systems. The course studies the testability issues for combinational and sequential circuits, including Automatic Test Pattern Generation (ATPG) techniques for combinational circuits, Design for Testability (DFT), Built-In Self-Test (BIST), memory testing and Boundary-Scan Architectures for sequential circuits. Students will then learn the basics of GPU architectures and GPU computing through CUDA or OpenCL languages. They also understand memory system designs based on static, dynamic and read-mostly memories, as well as mass storage technologies. The course covers modern computer bus standards as well as standard I/O interfaces. Students will also learn how to design asynchronous digital sequential systems including hazard-free and race-free circuits.

The course is supplemented by a term-length CPU design project that allows students to become proficient with Field Programmable Gate Array (FPGA) devices and associated CAD tools. Students will also work with a high-performance GPU cluster for their GPU computing studies.

This course builds on and supplements knowledge from other courses, including ELEC 271, ELEC 274, and some from ELEC 252.

Course Learning Outcomes (CLOs)
  • Know how high-performance circuits for fixed-point and floating-point arithmetic operationssuch as addition, subtraction, multiplication, and division work. They will learn carry-lookaheadcarry-select, carry-save addition, array multipliers, Booth algorithmmemory-based and table lookup techniques, as well as restoring and non-restoring algorithms, array dividers and multiplicative division.
  • Learn and use Verilog and VHDL language concepts, their behavioural modeling, structural modeling, subprograms and testbenches.
  • Distinguish faulty combinational gates and circuits from good ones by using techniques such as Path SensitizationTest FunctionBoolean DifferenceD-algorithm, and PODEM.
  • Learn how to design sequential circuits that can be easily tested; such techniques include Design for Testability (DFT)Built-In Self-Test (BIST), and Boundary-Scan Architecture.
  • Learn how to test memory chips and systems.
  • Understand the differences between task-level parallelism and data-level parallelism. Students get introduced to CUDA language, data-parallel execution model, kernel functions and threading, CUDA memories and performance considerations.
  • Understand the internal structure and timing diagrams of asynchronous and synchronous static, dynamic and read-mostly memories. They will learn to design memory systems consisting of such memory chips, and also understand how memory busses work in modern processors.
  • Learn bus architectures and centralized and decentralized bus arbitration mechanisms. They study different bus standards including PCI-XPCI-ExpressHyperTransport, Intel QuickpathUSBThunderbolt and InfiniBand Architecture
  • Know the basics of magnetic disks, Redundant Array of Independent Disks (RAID), and Solid State Drives (SSDs).
  • Design asynchronous sequential circuits. They will learn to design race-free, and static and dynamic hazard-free circuits.
  • Design, implement, and verify a simple CPU on an Altera FPGA chip. Students will design the datapath and control units in a systematic approach.
  • They learn how to use NVIDIA GPUs and CUDA programming techniques to solve basic linear algebra operations, such as matrix multiplication, using a cluster computer.